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Silicon Labs /Series0 /EZR32WG /EZR32WG330F128R69 /LEUART0 /IF

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Interpret as IF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TXC)TXC 0 (TXBL)TXBL 0 (RXDATAV)RXDATAV 0 (RXOF)RXOF 0 (RXUF)RXUF 0 (TXOF)TXOF 0 (PERR)PERR 0 (FERR)FERR 0 (MPAF)MPAF 0 (STARTF)STARTF 0 (SIGF)SIGF

Description

Interrupt Flag Register

Fields

TXC

TX Complete Interrupt Flag
TXBL

TX Buffer Level Interrupt Flag
RXDATAV

RX Data Valid Interrupt Flag
RXOF

RX Overflow Interrupt Flag
RXUF

RX Underflow Interrupt Flag
TXOF

TX Overflow Interrupt Flag
PERR

Parity Error Interrupt Flag
FERR

Framing Error Interrupt Flag
MPAF

Multi-Processor Address Frame Interrupt Flag
STARTF

Start Frame Interrupt Flag
SIGF

Signal Frame Interrupt Flag

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data